1. Field
The present description relates to integrated circuit packaging, and more particularly, to the placement of external connections on an integrated circuit package.
2. Background
IC's (Integrated Circuits) are manufactured in and on semiconductor wafers with several layers of active circuitry. The wafer is cut into separate semiconductor chips or dies which are mounted to and electrically coupled to package substrates. The substrates and dies are sealed inside a package for which the substrate is said to be on the land side of the package and the chip or die is said to be on the die side of the package. Pins, balls or lands for the ground plane, power plane and low level signaling extend from the package to allow the package to be coupled to a PCB (Printed Circuit Board), PWB (Printed Wiring Board), or a socket. Many packages also have a heat transfer plate or some other heat conducting structure to connect to a cooling device such as heat fins, heat pipes, liquid radiators, etc.
Typically, all of the package connections for ground, power, and signaling are placed on the land side of the package and extend directly from the package substrate. For more complex chips, this requires that the connectors be very close together and that the high level power connectors be placed close to low level signal connectors. The die side typically has no connections except for cooling connections. For example, the die side of the package may carry a finned heat sink. For higher power chips, a fan with power and control connectors may also be mounted to the die side of the package.
The die operates best with a clean power supply and reference voltage, for example a uniform voltage level and minimal noise. The power delivery path from a power supply such as a VRM (Voltage Regulator Module) to the die, however, has an inductance associated with it, creating impedance in the power delivery system. During core switching, when a portion of the microprocessor is powered up or powered down, a large amount of current is drawn by the die and the current change causes a large voltage drop at the die due to the inductance in the power delivery path. These voltage drops may be mitigated using decoupling capacitors, but the capacitors add complexity and expense to the system design. Some systems use bulk capacitors, die side capacitors, and on-die (or embedded chip) capacitors. Land side capacitors are also used in some systems.
In addition, the trend in processor design is to operate at lower voltages (1 volt or less) but higher power, this increases the necessary amperage (100 Amps or more). Higher current levels are more susceptible to impedance effects and voltage drops. High current levels also require more bulky and expensive connectors between the VRM and associated chip. High current levels also create interference or distortion in low level signaling connections.